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SSV

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Everything posted by SSV

  1. awesome....is the case acting as common/neutral for this design?
  2. generally on vSENSE leads we just need to mitigate enough thermo-electric effect to get a reading that doesn't drift with saturation....when we do this in other devices, we generally use a highly stable wire, with proper terminations or joints. A lot of error can be induced into vSENSE leads, from poor terminations, and wire that drifts under load. It's really dependent on what kind of granularity the FW will contain. I am assuming the resolution is below 10 bit? on the a/d?
  3. So it's possible to move away from the flat/flex ribbon to a "pigtail/jumper"? are there any capacitive issues to take into account with longer runs of traditional jumpers?
  4. Will this include full source code? I.E. will it be possible for developers to decompile and patch code base? Or is this intended more for "higher level" operations? Will the full Rx/Tx command base be included in the documentation? Thanks...
  5. From a developers standpoint, what is the interfacing to this? Is it JS in eclipse? or higher level? I am interested in building discreet/custom wire profiles for our various wire products. Is it going to be possible to build non-linear PTC scalars? I.E. develop a TC scalar for each discreet product. We have the necessary gear in our lab to test calibrations at various energy/heat levels. I would like to give my customers a downloadable file for each of our wire compositions and sizes. Thanks in advance.
  6. Not sure what Evolv recommends, but in ANY device I design or work on (trained EE here) we always include an inline PTC/thermistor immediately after BMS (unless BMS includes one, on board)
  7. They should just be vSENSE leads. No significant current is passing through them.....
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