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dwcraig1

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Posts posted by dwcraig1

  1. Voltage of cell 2 (5.24v) in 2nd picture indicates that the battery management chip on the board has gone bad.
    This is providing that the tap is configured as in the diagram posted above.
    Voltages measured off the JST plug would be:
    Cell #1's voltage between ground and pin 1
    Cell #2's voltage between pin #1 and pin(s) 3 or 2
    Voltage between pins 3/2 and ground should be the sum of both cells

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  2. Well the first thing to check is what the cell voltages  show in EScribe/ Device Monitor, also make sure it's set to 2 cells and not 3.............to start with.
    Maybe post a screen on Device Monitor.
    The tap should be reading pack voltage between 3 and ground.
    [jHA5aqr] 

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